RRAM-based FPGA for “Normally Off, Instantly On” applications

International audience“Normally Off, Instantly On” applications are becoming common in our environment. They range from healthcare to video surveillance. As the number of applications and their associated performance requirements grow rapidly, more and more powerful, flexible, and power efficient computing units are necessary. In such a context, Field Programmable Gate Arrays (FPGA) architectures present a good trade-off between performance and flexibility. However, they consume high static power and can hardly be associated with power-gating techniques due to their long context-restoring phase. In this paper, we propose to integrate non-volatile resistive memories in the configuration cells and registers in order to instantly restore the FPGA context. If the circuit is in the ‘ON’ state for less than 42% of time, non-volatile FPGA starts saving energy compared to classical FPGA. Finally, when context-saving functionality is included, for a typical application with only 1% of time spent in the ‘ON’ state, the energy gain exceeds 40

Bipolar ReRAM Based Non-­‐Volatile Flip-­‐flops for Low-­‐Power Architectures

International audience—Resistive Random Access Memories (ReRAMs) fabricated in the back-end-of-line are a promising breakthrough for including permanent retention mechanisms in embedded systems. This low-cost solution opens the way to advanced power management schemes. In this paper, we propose novel design architecture of a non-volatile flip-flop based on Bipolar ReRAMs (Bi-RNVFF). Compared to state-of-the-art Data-Retention flip-flop (with Balloon latch), the proposed design is 25% smaller due to 6T structure compared to the 8T structure of Data-Retention flip-flop. Moreover, being non-volatile, the proposed architecture exhibits a zero leakage compared to a Data-Retention Flip-Flop, which consumes ~3.2µW in sleep mode (leakage) for a 10K Flip-Flop design implemented in 22nm FDSOI technology. Our simulation results show that Bi-RNVFF is a true alternative for future " Power-on, Power-off " application adding Non-Volatility without significant burdening of the existing architectures

Operation and stability analysis of bipolar OxRRAM-based Non-Volatile 8T2R SRAM as solution for information back-up

International audienceThis work presents a Non-Volatile SRAM (NV-SRAM) cell, resilient to information loss. The cell features fast storage (20ns) for the operating voltage of 1.0V. The information is backed-up during POWER-DOWN/ RECOVERY cycle in two bipolar Oxide Resistive RAMs (OxRRAMs). The proposed NV-SRAM is designed with an 8T2R structure using 22nm FDSOI technology and resistive memory devices based on HfO 2. The stability and the reliability of the NV-SRAM cell is investigated by taking into account the variability of the transistors. It is shown that high R OFF /R ON is necessary to ensure reliable RECOVERY operation and high SRAM yield under cell area and power consumption constraints